Creating Heterogeneous Memory Systems in Intel® FPGA SDK for OpenCL Custom Platforms

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ID 683654
Date 12/13/2016
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Document Table of Contents
Document Table of Contents x
1. Creating Heterogeneous Memory Systems in Intel FPGA SDK for OpenCL Custom Platforms
1. Creating Heterogeneous Memory Systems in Intel FPGA SDK for OpenCL Custom Platforms x
1.1. Verifying the Functionality of the FPGA Board and the EMIF Interfaces 1.2. Modifying the board_spec.xml File 1.3. Setting Up Multiple Memory Dividers in Qsys 1.4. Modifying the Boardtest Program and the Host Code for Your Heterogeneous Memory Solution 1.5. Verifying the Functionality of Your Heterogeneous Memory System 1.6. Document Revision History
1. Creating Heterogeneous Memory Systems in Intel FPGA SDK for OpenCL Custom Platforms

1.1. Verifying the Functionality of the FPGA Board and the EMIF Interfaces

Verify each memory interface independently and then instantiate your Custom Platform using global memory.
  1. Verify each memory interface using hardware designs that can test the speed and stability of each interface.
  2. Instantiate your Custom Platform using global memory.
    For example, if you have three DDR interfaces, one of them must be mapped as heterogeneous memory. In this case, verify the functionality of the OpenCL stack with each DDR interface independently.

    Alternatively, if you have two DDR interfaces and one quad data rate (QDR) interface, verify the functionality of the OpenCL stack of the two DDR interfaces and the QDR interface independently.

Intel® recommends that you use PCI Express®- (PCIe®-) or EMIF-exclusive designs to test your memory interfaces. After you verify that each memory interface is functional and that your OpenCL design works with a subset of the memory interfaces, proceed to create a fully functional heterogeneous memory system.
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