Intel® Quartus® Prime Pro Edition User Guide: Platform Designer

ID 683609
Date 10/02/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

7.11. Avalon® Streaming Single-Clock and Dual-Clock FIFO Intel® FPGA IP

The Avalon® Streaming Single-Clock and Avalon® Streaming Dual-Clock FIFO Intel® FPGA IP are FIFO buffers which operate with a common clock and independent clocks for input and output ports respectively.
Figure 278.  Avalon® Streaming Single Clock FIFO Intel® FPGA IP
Figure 279.  Avalon® Streaming Dual Clock FIFO Intel® FPGA IP