AN 702: Interfacing a USB PHY to the Hard Processor System USB 2.0 OTG Controller

ID 683601
Date 9/22/2017
Public
Document Table of Contents

1. AN 702: Interfacing a USB PHY to the Hard Processor System USB 2.0 OTG Controller

The Arria® V Hard Processor System (HPS) and Cyclone® V HPS each provide two USB On-the-Go (OTG) controllers. Each USB 2.0 OTG controller supports a single USB port connected through a USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) Low Pin Interface (ULPI) compliant PHY.

When interfacing your design to a USB PHY, it is important to do timing analysis to ensure that the interface between the USB controller and USB PHY works reliably across a range of process, voltage and temperature (PVT) variations.