E-tile Hard IP Intel® Stratix® 10 Design Examples User Guide: Ethernet, CPRI PHY, and Dynamic Reconfiguration

ID 683578
Date 4/10/2023

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Document Table of Contents

3.2.1. Features

  • TX and RX serial loopback mode
  • Generate the design example with RS-FEC feature
  • PMA adaptation
  • Supports TX and RX external loopback mode when you turn on PMA adaptation feature
  • Basic packet checking capabilities including round trip latency count
  • Ability to use System Console to reset the design for re-testing purpose