Intel Agilex® 7 Logic Array Blocks and Adaptive Logic Modules User Guide

ID 683577
Date 3/27/2023
Public Clear Logic Control

LAB-wide signals control the logic for the ALM register's clear signal. The ALM register directly supports both a synchronous and an asynchronous clear. Each LAB supports one synchronous clear signal and two asynchronous clear signals.

Figure 5.  Intel Agilex® 7 LAB-Wide Control Signals