Intel® High Level Synthesis Compiler Pro Edition: User Guide

ID 683456
Date 10/04/2021
Public

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A.3.2. Loops Viewer (Alpha)

Use the Loops Viewer in the High-Level Design Reports to see the behavior of both implicit and explicit loops in your component and task functions. The Loops Viewer shows the behavior as a color-coded bar graph.

Alpha: As an alpha-level tool, the Loops Viewer is subject to some restrictions. Refer to Known Issues and Workarounds in the Intel® High Level Synthesis Compiler Pro Edition Release Notes for details.

By default, the Loops Viewer shows the visualization for one iteration (trip count of 1) of the loops, unless the loop is defined in your code with a constant number of iterations. You can adjust the number of displayed iterations and update the viewer to see how different trip counts for loops affect your component.

To access this tool report, click Throughput Analysis > Loops Viewer.

The Loops Viewer has the following panes:
  • Loops List

    The Loops List pane shows a list of the explicit and implicit loops identified by the compiler in your design.

    Click entries in the Loops List pane to focus the graphs shown in the Loops Viewer pane on a loop in your design, or click System to have all loops in your design show in the Loops Viewer pane.

  • Bottlenecks

    This pane does not provide any information in the Loops Viewer.

    To see information about loop bottlenecks, use the Bottlenecks pane in the Loop Analysis Report. For details about this report, refer to Loop Analysis Report.

  • Code view

    The code view pane lets you view all the code associated with your design.

  • Details

    When you click a row in the Loops Viewer pane, the Details pane provides any additional details if they are available.

Loops Viewer Pane

The Loops Viewer pane is split into the following parts:

  • The left part shows labels for loops and their parts, and the start and end cycle for the loop parts. This part also shows the number of trip counts displayed for a loop.

    To adjust the number of trip counts displayed for a loop, change the value in the Trip Count field for a loop and click Update.

    You might need to scroll left and right to see the Trip Count fields and the Update button.

  • The right part shows the duration (in number of clock cycles) of loop invocations and loop iterations as horizontal bars on a graph, similar to the presentation of Gantt charts.
    The horizontal bars are color-coded as follows:
    Table 7.  Loops Viewer Color Coding
    Color Description
    Black bars show the length of a loop invocation.

    A loop can be invoked multiple times when your design runs.

    Pink bars show the length of a loop iteration.

    A loop iteration is one execution of the body of your loop. One loop invocation typically results in more than one loop iteration.

    Light-pink bars show speculated loop iterations.

    Speculated iterations are loop iterations that are initiated while the loop exit condition is being calculated. They help enable more efficient loop pipelining in your component.

    For more information about speculated iterations, refer to Loop Iteration Speculation (speculated_iterations Pragma) in the Intel High Level Synthesis Compiler Pro Edition Reference Manual .

    Blue bars show the execution of logic outside of the innermost loop body, including loop control logic created by the compiler.
    Light-blue bars show handshaking registers added by the compiler.

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