1. Intel® High Level Synthesis Compiler Pro Edition User Guide
|Intel® Quartus® Prime Design Suite 21.3|
Compared to traditional RTL development, the Intel® HLS Compiler offers the following advantages:
- Fast and easy verification
- Algorithmic development in C++
- Automatic integration of RTL verification with a C++ testbench
- Powerful microarchitecture optimizations
In this publication, <quartus_installdir> refers to the location where you installed Intel® Quartus® Prime Design Suite.
About the Intel® HLS Compiler Pro Edition Documentation Library
|Title and Description|
| Release Notes
Provide late-breaking information about the Intel® HLS Compiler.
| Getting Started Guide
Get up and running with the Intel® HLS Compiler by learning how to initialize your compiler environment and reviewing the various design examples and tutorials provided with the Intel® HLS Compiler.
| User Guide
Provides instructions on synthesizing, verifying, and simulating intellectual property (IP) that you design for Intel FPGA products. Go through the entire development flow of your component from creating your component and testbench up to integrating your component IP into a larger system with the Intel Quartus Prime software.
| Reference Manual
Provides reference information about the features supported by the Intel HLS Compiler. Find details on Intel® HLS Compiler command options, header files, pragmas, attributes, macros, declarations, arguments, and template libraries.
| Best Practices Guide
Provides techniques and practices that you can apply to improve the FPGA area utilization and performance of your HLS component. Typically, you apply these best practices after you verify the functional correctness of your component.
| Quick Reference
Provides a brief summary of Intel HLS Compiler declarations and attributes on a single two-sided page.
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