Avalon Verification IP Suite: User Guide

ID 683439
Date 8/28/2025
Public
Document Table of Contents

18.2.2. Generating a Platform Designer Testbench System

Follow these steps to generate a testbench system for the DUT.
  1. On the Generate tab, select Generate Testbench System.
  2. Change the parameter values to match the values listed in the table.
    Table 25.  Generation Tab Parameter Values
    Parameters Value
    Simulation
    Create testbench Qsys system Standard, BFMs for standard Qsys Interfaces
    Create simulation model Verilog
    Output Directory
    Testbench Accept the path specified. (This path is not shown for the Quartus® Prime Pro Edition software.)
  3. Click Generate. Save the system if you are prompted to do so. Click Close.