10Gbps Ethernet Accelerator Functional Unit (AFU) Design Example User Guide: Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA

ID 683422
Date 4/30/2019

3.2. Running 10GbE Internal Loopback Test in Single Intel® PAC System

  1. Load the AF for the 10GbE AFU example.
    $ sudo fpgaconf hw/samples/eth_e2e_e10/bin/eth_e2e_e10.gbs
  2. cd $OPAE_PLATFORM_ROOT/hw/samples/eth_e2e_e10/sw
  3. Run the following steps on your Intel® PAC:
    1. Compile the library and application using the command:
      $ make
    2. To configure the transceiver channel into 10G mode, write 10 to the following sysfs entry:
      $ sudo sh -c "echo 10 > /sys/class/fpga/intel-fpga-dev.<instance_id>\

      <instance_id> represents the consecutive numbering of device, fme, and hssi instances.

      For example:
      sudo sh -c "echo 10 > /sys/class/fpga/intel-fpga-dev.0\
    3. To allow non-root users to access the 10GbE AFU instance, you can provide read and write privileges to the port (/dev/intel-fpga-port.\*) where \* denotes the respective socket. For example, to provide read and write privileges on Port 0:
      $ sudo chmod 666 /dev/intel-fpga-port.0
    4. To resolve library dependency:
    5. To enable the internal loopback on B:D:F - 00:0a:0b,
      $ ./pac_hssi_e10 -b 00 -d 0a -f 0b --action=loopback_enable
    6. To clear PHY, transmit, and receive statistics:
      $ ./pac_hssi_e10 -b 00 -d 0a -f 0b --channel=0 --action=stat_clear
      Sample output:
      Cleared TX stats on channel 0
      Cleared RX stats on channel 0
    7. To transmit 0x1000 packets:
      $ ./pac_hssi_e10 -b 00 -d 0a -f 0b --channel=0 --action=pkt_send
      Sample output:
      Sent 0x10000 packets on channel 0
      Note: After programming the eth_e2e_e10 AFU, the initial send of packets may drop the first packet. Subsequent packet sends do not drop any packets.
    8. To get PHY, transmit and receive statistics:
      $ ./pac_hssi_e10 -b 00 -d 0a -f 0b --channel=0 --action=stat
    To find the instance id associated with your device:
    $ ls /sys/class/fpga/
    For more details, refer to the README file located in the sw subdirectory to:

    To run this example on a virtual machine:

    1. Program the eth_e2e_e10 AFU and configure the transceiver channel to 10G mode from the Host machine by referencing the previous substeps.
    2. Follow the steps in the Running the OPAE in a Virtualized Environment section of the Intel® Acceleration Stack Quick Start Guide for Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA to create a virtual function and attach the virtual function to a virtual machine.
    3. Run the internal loopback test on the virtual machine.