CPRI Intel® FPGA IP Core Release Notes

ID 683403
Date 5/19/2023

1.10. CPRI Intel® FPGA IP v18.1

Table 10.  v18.1 2019.05.17
Intel® Quartus® Prime Version Description Impact
18.1 Changed the name of the IP to CPRI Intel® FPGA IP in Intel® Quartus® Prime IP Catalog.
Renamed the IP parameter: Altera Debug Master Endpoint (ADME) to Native PHY Debug Master Endpoint (NPDME).
Added new register: IP_INFO.
Added new register bit in TX_SCR Register: tx_scr_active.
Added register DEBUG_STATUS at offset 0xA0  
Added 12165.12 Mbps and 24330.24 Mbps line bit rate support for Intel® Stratix® 10 devices.  
Added the Hybrid core clocking mode.  
Added support for 64-bit interface.