Figure 21. Example 2, 1U Sled Top View

In this 3-FPGA system, the first two FPGAs have static functions that do not change with time, and the third FPGA’s power image can change with various applications. To determine the maximum power image of the third FPGA, we must determine its effective Ψ_CA and ambient temperature.

The following figure shows the PTC Thermal page for this design, with core die power of 99 watts and total FPGA power of 152 watts.

Figure 22. Example 2, PTC Thermal Page

If we conduct the CFD simulation of this system three times, with core powers of 76 watts, 99 watts, and 124 watts, we get the following graph of FPGA total power versus case temperature.

Figure 23. Example 2, Linear Regression

The above graph shows that the effective Ψ_CA is 0.2°C/W and the effective ambient temperature is 41°C. Referring to the following figure, we can see that by entering these values into the PTC, we find that the maximum junction temperature for this case is 84°C. These results indicate that, depending on the maximum required T_J, there may still be some margin.

Figure 24. Example 2, PTC Thermal Results

If we assume that the maximum allowable T_J is 90°C, then by adding functionality to the core we can determine at what core power level the maximum T_J reaches 90°C. The figure below shows the results on the PTC Thermal page, where the total FPGA power is found to be 186 watts.

Another way to approach this, would be to enter your design with the effective ambient temperature of 41°C and the desired maximum T_J where the viable solutions would be those with Ψ_CA ≤ 0.2°C/W.

Figure 25. Example 2, Maximum FPGA Power