AN 747: Implementing PHYLite in Intel® Arria® 10 Devices Design Examples

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ID 683384
Date 5/08/2017
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Document Table of Contents
Document Table of Contents x
1. AN 747: Altera PHYLite for Parallel Interfaces Loopback Reference Designs Application Note
1. AN 747: Altera PHYLite for Parallel Interfaces Loopback Reference Designs Application Note x
1.1. Simple Input/Output PHYLite Simulation Design Example 1.2. Simple Input/Output PHYLite with Dynamic Reconfiguration Hardware Reference Design 1.3. Functional Description 1.4. Document Revision History
1.1. Simple Input/Output PHYLite Simulation Design Example x
1.1.1. Simulation Design Example Architecture 1.1.2. Simulation Reference Design User Guide 1.1.3. Result
1.1.2. Simulation Reference Design User Guide x
1.1.2.1. Requirements 1.1.2.2. Setting Up the Simulation Environment 1.1.2.3. Running Simulation
1.2. Simple Input/Output PHYLite with Dynamic Reconfiguration Hardware Reference Design x
1.2.1. Hardware Reference Design Architecture 1.2.2. Hardware Design Example User Guide 1.2.3. Result
1.2.2. Hardware Design Example User Guide x
1.2.2.1. System Requirements 1.2.2.2. Setting Up the Development Kit 1.2.2.3. Generating Executable and Linking Format (.elf) Programming File 1.2.2.4. Running the Hardware Reference Design
1.2.3. Result x
1.2.3.1. Dynamic Calibration Result 1.2.3.2. Random Data Transfer Result
1. AN 747: Altera PHYLite for Parallel Interfaces Loopback Reference Designs Application Note

1.2.2.4. Running the Hardware Reference Design

Follow the steps below to run dynamic calibration and start the data transfer for the hardware reference design.

  1. In the Intel® Quartus® Prime software installation directory in your host machine and double click on Nios II Command Shell.bat to launch the command prompt window (command prompt A). Repeat this step to launch the second command shell (command prompt B).
    Command prompt A is to display the dynamic calibration result. Command prompt B is used to run Nios II commands.
  2. In command prompt A, use the following command to run the Nios II terminal application for result printouts.
    nios2-terminal
  3. In command prompt B, go to the project top directory.
    cd <project directory>
  4. Run the issp.tcl script once to reset the system and clean up the instruction memory in the Nios II soft processor.
    quartus_stp -t issp.tcl top.qpf 1 1
    Note: Ignore the failing dynamic calibration result displayed in command prompt A. This is the result from the original executable code in the Nios II memory and is not relevant to the design example.
  5. In command prompt B, download the executable (phylite_nios_1DQ2DQS_new.elf) file into the FPGA and start the dynamic calibration process with the following command:
    nios2-download -r -g software/phylite_nios_1DQ2DQS_new/phylite_nios_1DQ2DQS_new.elf
    You may observe the passing dynamic calibration result displayed in command prompt A.
  6. When the Nios II instruction memory is cleaned and calibration is done, run the following command in command prompt B to reset the system, start the random data transfer and capture internal signals.
    quartus_stp -t issp.tcl top.qpf 1 1 1
    Note: You will see sent and received data displayed in command prompt B after running the command.
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