Intel® Stratix® 10 Avalon® Streaming (Avalon-ST) IP for PCIe* Design Example User Guide

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ID 683361
Date 3/07/2022
Public

1.5. Simulating the Design Example

Figure 5. Procedure
  1. Change to the testbench simulation directory, pcie_example_design_tb.
  2. Run the simulation script for the simulator of your choice. Refer to the table below.
  3. Analyze the results.
Table 1.  Steps to Run Simulation
Simulator Working Directory Instructions
ModelSim* <example_design>/pcie_example_design_tb/pcie_example_design_tb/sim/mentor/
  1. Invoke vsim (by typing vsim, which brings up a console window where you can run the following commands).
  2. do msim_setup.tcl
    Note: Alternatively, instead of doing Steps 1 and 2, you can type: vsim -c -do msim_setup.tcl.
  3. ld_debug
  4. run -all
  5. A successful simulation ends with the following message, "Simulation stopped due to successful completion!"
VCS* <example_design>/pcie_example_design_tb/pcie_example_design_tb/sim/synopsys/vcs
  1. sh vcs_setup.sh USER_DEFINED_COMPILE_OPTIONS="" USER_DEFINED_ELAB_OPTIONS="-xlrm\ uniq_prior_final" USER_DEFINED_SIM_OPTIONS=""
  2. A successful simulation ends with the following message, "Simulation stopped due to successful completion!"
NCSim* <example_design>/pcie_example_design_tb/pcie_example_design_tb/sim/cadence
  1. sh ncsim_setup.sh USER_DEFINED_SIM_OPTIONS="" USER_DEFINED_ELAB_OPTIONS="-timescale\ 1ns/1ps"
  2. A successful simulation ends with the following message, "Simulation stopped due to successful completion!"
Xcelium* Parallel Simulator <example_design>/pcie_example_design_tb/pcie_example_design_tb/sim/xcelium
  1. sh xcelium_setup.sh USER_DEFINED_SIM_OPTIONS="" USER_DEFINED_ELAB_OPTIONS ="-timescale\ 1ns/1ps\ -NOWARN\ CSINFI"
  2. A successful simulation ends with the following message, "Simulation stopped due to successful completion!"

This testbench simulates up to x8 variants. It supports x16 variants by down-training to x8. To simulate all lanes of a x16 variant, you can create a simulation model using the Platform Designer to use in an Avery testbench. For more information refer to AN-811: Using the Avery BFM for PCI Express* Gen3x16 Simulation on Intel Stratix 10 Devices.

The simulation reports, "Simulation stopped due to successful completion" if no errors occur.

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