Intel® Stratix® 10 Avalon® Streaming (Avalon-ST) IP for PCIe* Design Example User Guide

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ID 683361
Date 3/07/2022
Public

1. Quick Start Guide

Updated for:
Intel® Quartus® Prime Design Suite 17.1

Using Intel® Quartus® Prime software, you can generate a programmed I/O (PIO) design example for the Intel L-/H-Tile Avalon-ST for PCI Express IP core. The generated design example reflects the parameters that you specify. The PIO example transfers data from a host processor to a target device. It is appropriate for low-bandwidth applications. This design example automatically creates the files necessary to simulate and compile in the Intel® Quartus® Prime software. You can download the compiled design to the Intel® Stratix® 10-GX FPGA Development Board. To download to custom hardware, update the Intel® Quartus® Prime Settings File (.qsf) with the correct pin assignments .

Figure 1. Development Steps for the Design Example

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