Mailbox Client Intel® FPGA IP User Guide

ID 683290
Date 12/04/2023
Public
Document Table of Contents

1.9. Mailbox Client Intel FPGA IP Core Use Case Examples

The Mailbox Client Intel FPGA IP is an Avalon® memory-mapped interface slave component that must connect to an Avalon® memory-mapped interface master. The simplest Avalon® memory-mapped interface master is the JTAG-to-Avalon Master.

The rsu1.tcl script provides examples to perform all the available command functions. You can run the functions available in the rsu1.tcl script via System Console of the Intel® Quartus® Prime software.

The following example shows how to access the quad SPI flash memory. Follow this sequence to prevent errors.
  1. QSPI_OPEN
  2. QSPI_SET_CS
  3. Any of the following quad SPI operations:
    • QSPI_READ
    • QSPI_WRITE
    • QSPI_ERASE
    • QSPI_READ_DEVICE_REG
    • QSPI_WRITE_DEVICE_REG
    • QSPI_SEND_DEVICE_OP
  4. QSPI_CLOSE