Intel® High Level Synthesis Compiler Pro Edition: Best Practices Guide

ID 683152
Date 9/23/2022
Public
Document Table of Contents

3.3. Methods of Hardware Design

Traditionally, you program an FPGA using a hardware description language (HDL) such as Verilog or VHDL. However, a recent trend is to use higher-level languages.

Higher levels of abstraction can reduce the design time and increase the portability of your design.

The sections that follow discuss how Intel® HLS Compiler maps high-level languages to a hardware datapath.

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