1.1. Power Saving Using Auto Stop and Auto Start
Many consumer and industrial application systems do not require the device to be powered on at all times. In fact, it is preferable to have a system in which the device powers on intermittently, as and when required only, and remains off for most of the cycle. The supported Altera devices are designed to tolerate any possible power-on sequence. They also have one of the industry’s lowest power-up timing characteristics (typically 200 microseconds for the EPM240 device, depending on the density of logic in the design). The MAX 10 Single Supply devices are designed for you to easily manage the power-up sequence on the board. The MAX 10 Single Supply devices support instant-on feature, which is the fastest power-up mode for MAX 10 devices.
This makes the supported Altera devices the perfect target device for such a system. The device can be turned off when a task is complete and switched back on again for its next task. The self power down is caused by the device itself, while the auto power up is caused by an external circuitry such as a simple RC circuit designed for the required delay. The entire scheme finds context in power savings, typically in battery operated systems which may be used for functions that are cyclical or periodic in nature (such as sampling for parameters in a telemetering system), where the power can be turned off when the device can afford to take a break.
The device generates two signals, power down and its complement to cause self power down by triggering an external circuit to shutdown the LDO supplying power to the device. After the device is off, the external circuit powers it back on after the designed delay of the external RC circuit. An LED glows upon power on and switches off after the device is powered down.
This section describes the self-power-down and auto-power-up capability of the supported Altera device. An LED indicates power to the supported Altera device. When the device is on, the power_dwn signal is low (power_dwn_inv is high). The shutdown pin on the LDO is inactive (active low) and the LDO continues to remain on. Capacitor C is kept in its discharged condition.
To switch off the device, the power_dwn signal goes high (power_dwn_inv goes low). This causes the LDO to shutdown, and thereby switching off the device. The I/O pins on the device get tri-stated, releasing the pull down on the capacitor. The capacitor starts charging with the time constant R1*C. It charges until the voltage across it remains less than the threshold potential of the shutdown pin on the LDO (enhanced by voltage drops across diodes D1 and D2). When the threshold is reached, the LDO turns on and, consequently, the supported Altera device turns on. This cycle continues to repeat itself.
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