Visible to Intel only — GUID: lro1402199643768
Ixiasoft
Visible to Intel only — GUID: lro1402199643768
Ixiasoft
31.4. mSGDMA Descriptors
The descriptor agent port is 128-bits for standard descriptors and 256-bits for extended descriptors. The tables below show acceptable standard and extended descriptor formats.
Byte Lanes | |||||
---|---|---|---|---|---|
Offset | Access | 3 | 2 | 1 | 0 |
0x0 | Write | Read Address[31:0] | |||
0x4 | Write | Write Address[31:0] | |||
0x8 | Write | Length[31:0] | |||
0xC | Write | Control[31:0] |
Byte Lanes | |||||
---|---|---|---|---|---|
Offset | Access | 3 | 2 | 1 | 0 |
0x0 | Write | Read Address[31:0] | |||
0x4 | Write | Write Address[31:0] | |||
0x8 | Write | Length[31:0] | |||
0xC | Write | Write Burst Count[7:0] | Read Burst Count [7:0] | Sequence Number[15:0] | |
0x10 | Write | Write Stride[15:0] | Read Stride[15:0] | ||
0x14 | Write | Read Address[63:32] | |||
0x18 | Write | Write Address[63:32] | |||
0x1C | Write | Control[31:0] |
All descriptor fields are aligned on byte boundaries and span multiple bytes when necessary. You can access each byte lane of the descriptor agent port independently of the others, allowing you to populate the descriptor using any access size.