Ethernet Design Example Components User Guide

ID 683044
Date 4/01/2024
Document Table of Contents

3.1. Release Information

Intel® FPGA IP versions match the Quartus® Prime Design Suite software versions until v19.1. Starting in Quartus® Prime Design Suite software version 19.2, Intel® FPGA IP has a new versioning scheme.

The Intel® FPGA IP version (X.Y.Z) number can change with each Quartus® Prime software version. A change in:

  • X indicates a major revision of the IP. If you update the Quartus® Prime software, you must regenerate the IP.
  • Y indicates the IP includes new features. Regenerate your IP to include these new features.
  • Z indicates the IP includes minor changes. Regenerate your IP to include these changes.
Table 26.  Ethernet Packet Classifier Intel® FPGA IP Release Information
Item Description
IP Version 19.3.1
Quartus® Prime Version 24.1
Release Date 2024.04.01
Supported Devices
  • Agilex™ 5
  • Agilex™ 7
  • Stratix® 10
  • Stratix® V GX/GT
  • Arria® 10 GX/GT/SX
  • Arria® V GX/GT/GZ/SX/ST
  • Cyclone® V SE/SX/ST
  • MAX® 10