Ethernet Design Example Components User Guide

ID 683044
Date 4/01/2024
Document Table of Contents

3.3. Configuring the Packet Classifier

In the Quartus® Prime software, instantiate the Packet Classifier by selecting Ethernet Packet Classifier Intel® FPGA IP from the IP Catalog or Platform Designer (Interface Protocols > Ethernet > Reference Design Components). Specify the parameters in the following table.

Table 31.  Packet Classifier Parameters Description
Name Value Default Description
TSTAMP_FP_WIDTH 1 – 32 4 The width of the timestamp fingerprint.
SYMBOLSPERBEAT 1, 4, or 8 8 The number of symbols transferred in a clock cycle.
BITSPERSYMBOL 8 8 The number of bits per symbol transferred in a clock cycle.