F-Tile Ethernet Intel® FPGA Hard IP User Guide

ID 683023
Date 3/28/2022
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7.13. Precision Time Protocol Interface

The Precision Time Protocol (PTP) interface is available when you enable Enable IEEE 1588 PTP option in the PTP tab. When selected, the IP generates PTP based 1-step or 2-step TX and RX timestamps. The IP requires the IEEE 1588 96-bit time-of-day (TOD) input.
Table 54.  PTP Clock Ports

Signal Name

Width

Description

i_clk_tx_tod 1

TX TOD input clock. The clock frequencies vary based on the Ethernet rate and the selected Timestamp accuracy mode.

In Basic timestamp accuracy mode, connect this signal to any clock with below frequency.
  • 10GE: 390.625 MHz
  • 25GE/50GE/100GE/200GE/400GE: 390.625 MHz
In Advanced timestamp accuracy mode, connect this signal to the o_clk_tx_div clock.
  • 10GE: 156.25 MHz
  • 25GE/50GE/100GE/200GE/400GE: 390.625 MHz
i_clk_rx_tod 1

RX TOD input clock. The clock frequencies vary based on the Ethernet rate and the selected Timestamp accuracy mode.

In Basic timestamp accuracy mode, connect this signal to any clock with below frequency.
  • 10GE: 390.625 MHz
  • 25GE/50GE/100GE/200GE/400GE: 390.625 MHz
In Advanced timestamp accuracy mode, connect this signal to the o_clk_rec_div clock.
  • 10GE: 156.25 MHz
  • 25GE/50GE/100GE/200GE/400GE: 390.625 MHz
i_clk_ptp_sample 1 Sample clock for the PTP measurement. The clock frequency is 114.2857 MHz.

The same sample clock feeds the PTP logics of designs instantiating multiple F-Tile Ethernet Intel® FPGA Hard IPs.