Intel® oneAPI DPC++/C++ Compiler Developer Guide and Reference

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Date 3/31/2023
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Document Table of Contents
Document Table of Contents x
Intel® oneAPI DPC++/C++ Compiler Developer Guide and Reference
Intel® oneAPI DPC++/C++ Compiler Developer Guide and Reference x
Intel® oneAPI DPC++/C++ Compiler Introduction Compiler Setup Compiler Reference Compilation Optimization and Programming Compatibility and Portability Notices and Disclaimers
Intel® oneAPI DPC++/C++ Compiler Introduction x
Get Help and Support Related Information
Compiler Setup x
Use the Command Line Use Eclipse Use Microsoft Visual Studio
Use the Command Line x
Specify Component Locations Invoke the Compiler Use the Command Line on Windows File Extensions Use Makefiles for Compilation Use CMake with the Compiler Use Compiler Options Specify Compiler Files Convert Projects to Use a Selected Compiler
Use Eclipse x
Add the Compiler to Eclipse Multiversion Compiler Support Use Cheat Sheets Create a Simple Eclipse Project Makefiles Use Intel Libraries with Eclipse
Use Microsoft Visual Studio x
Create a New Project Use the Intel® oneAPI DPC++/C++ Compiler Select the Compiler Version Specify a Base Platform Toolset Use Property Pages Use Intel® Libraries with Microsoft Visual Studio* Include MPI Support Dialog Box Help
Dialog Box Help x
Options: Compilers dialog box Use Intel® oneAPI DPC++/C++ Compiler dialog box Options: Intel Libraries for oneAPI dialog box Options: Converter dialog box
Compiler Reference x
C/C++/SYCL Calling Conventions Compiler Options Floating-Point Operations Attributes Intrinsics Libraries Macros Pragmas Error Handling
Compiler Options x
Alphabetical Option List General Rules for Compiler Options What Appears in the Compiler Option Descriptions Optimization Options Code Generation Options Interprocedural Optimization Options Advanced Optimization Options Optimization Report Options Offload Compilation, OpenMP*, and Parallel Processing Options Floating-Point Options Inlining Options Output, Debug, and Precompiled Header Options Preprocessor Options Component Control Options Language Options Data Options Compiler Diagnostic Options Compatibility Options Linking or Linker Options Miscellaneous Options Deprecated and Removed Compiler Options Display Option Information Alternate Compiler Options Portability and GCC-Compatible Warning Options
Optimization Options x
fast fbuiltin, Oi foptimize-sibling-calls GF nolib-inline O Od Ofast Os Ot Ox
Code Generation Options x
arch ax, Qax EH fasynchronous-unwind-tables fdata-sections, Gw fexceptions ffunction-sections, Gy fomit-frame-pointer Gd GR guard Gv m, Qm m64, Qm64 m80387 march masm mbranches-within-32B-boundaries, Qbranches-within-32B-boundaries mintrinsic-promote, Qintrinsic-promote momit-leaf-frame-pointer mtune, tune regcall, Qregcall x, Qx xHost, QxHost Syntax Arguments Default Description IDE Equivalent Alternate Options
Interprocedural Optimization Options x
flto ipo, Qipo
Advanced Optimization Options x
ffreestanding, Qfreestanding fjump-tables fvec-peel-loops, Qvec-peel-loops fvec-remainder-loops, Qvec-remainder-loops fvec-with-mask, Qvec-with-mask ipp-link, Qipp-link qactypes, Qactypes qdaal, Qdaal qipp, Qipp qmkl, Qmkl qmkl-ilp64, Qmkl-ilp64 qopt-assume-no-loop-carried-dep, Qopt-assume-no-loop-carried-dep qopt-dynamic-align, Qopt-dynamic-align qopt-for-throughput, Qopt-for-throughput qopt-mem-layout-trans, Qopt-mem-layout-trans qopt-multiple-gather-scatter-by-shuffles, Qopt-multiple-gather-scatter-by-shuffles qopt-streaming-stores, Qopt-streaming-stores qtbb, Qtbb unroll, Qunroll use-intel-optimized-headers, Quse-intel-optimized-headers vec, Qvec vec-threshold, Qvec-threshold
Optimization Report Options x
qopt-report, Qopt-report qopt-report-file, Qopt-report-file
Offload Compilation, OpenMP*, and Parallel Processing Options x
device-math-lib fintelfpga fiopenmp, Qiopenmp fno-sycl-libspirv foffload-static-lib fopenmp fopenmp-declare-target-scalar-defaultmap, Qopenmp-declare-target-scalar-defaultmap fopenmp-device-lib fopenmp-target-buffers, Qopenmp-target-buffers fopenmp-targets, Qopenmp-targets fsycl fsycl-add-targets fsycl-dead-args-optimization fsycl-device-code-split fsycl-device-lib fsycl-device-only fsycl-early-optimizations fsycl-enable-function-pointers fsycl-esimd-force-stateless-mem fsycl-explicit-simd fsycl-force-target fsycl-help fsycl-host-compiler fsycl-host-compiler-options fsycl-id-queries-fit-in-int fsycl-instrument-device-code fsycl-link fsycl-link-huge-device-code fsycl-link-targets fsycl-max-parallel-link-jobs fsycl-rdc fsycl-targets fsycl-unnamed-lambda fsycl-use-bitcode nolibsycl qopenmp, Qopenmp qopenmp-lib, Qopenmp-lib qopenmp-link qopenmp-simd, Qopenmp-simd qopenmp-stubs, Qopenmp-stubs reuse-exe Wno-sycl-strict Xopenmp-target Xs Xsycl-target
Floating-Point Options x
ffp-contract fimf-absolute-error, Qimf-absolute-error fimf-accuracy-bits, Qimf-accuracy-bits fimf-arch-consistency, Qimf-arch-consistency fimf-domain-exclusion, Qimf-domain-exclusion fimf-max-error, Qimf-max-error fimf-precision, Qimf-precision fimf-use-svml, Qimf-use-svml fma, Qfma fp-model, fp fp-speculation, Qfp-speculation pc, Qpc
Inlining Options x
fgnu89-inline finline finline-functions
Output, Debug, and Precompiled Header Options x
c debug (Linux*) debug (Windows*) Fa fasm-blocks Fe Fo Fp ftrapuv, Qtrapuv fverbose-asm g gdwarf grecord-gcc-switches gsplit-dwarf o RTC S use-msasm Y- Yc Yu Zi, Z7, ZI
Preprocessor Options x
B C D dD, QdD dM, QdM E EP FI H, QH I I- idirafter imacros iprefix iquote isystem iwithprefix iwithprefixbefore Kc++, TP M, QM MD, QMD MF, QMF MG, QMG MM, QMM MMD, QMMD MQ MT, QMT nostdinc++ P pragma-optimization-level U undef X
Component Control Options x
Qoption
Language Options x
ansi fno-gnu-keywords fno-operator-names fno-rtti fpermissive fshort-enums fsyntax-only funsigned-char J std, Qstd strict-ansi vd vmg x (type option) Zc Zg Zp Zs
Data Options x
fcommon fkeep-static-consts, Qkeep-static-consts fmath-errno fpack-struct fpic fpie fstack-protector fstack-security-check fvisibility fzero-initialized-in-bss, Qzero-initialized-in-bss GA Gs GS mcmodel Qlong-double
Compiler Diagnostic Options x
w w, W Wabi Wall Wcheck-unicode-security Wcomment Wdeprecated Weffc++, Qeffc++ Werror, WX Werror-all Wextra-tokens Wformat Wformat-security Wmain Wmissing-declarations Wmissing-prototypes Wpointer-arith Wreorder Wreturn-type Wshadow Wsign-compare Wstrict-aliasing Wstrict-prototypes Wtrigraphs Wuninitialized Wunknown-pragmas Wunused-function Wunused-variable Wwrite-strings
Compatibility Options x
gcc-toolchain vmv
Linking or Linker Options x
F (Windows*) fixed fuse-ld l L LD link MD MT no-libgcc nodefaultlibs no-intel-lib, Qno-intel-lib nostartfiles nostdlib pie pthread shared shared-intel shared-libgcc static static-intel static-libgcc static-libstdc++ T u (Linux*) v Wa Wl Wp Xlinker Zl
Miscellaneous Options x
dryrun dumpmachine dumpversion help nologo save-temps, Qsave-temps showIncludes sox, Qsox sysroot Tc TC Tp version watch
Floating-Point Operations x
Programming Tradeoffs in Floating-Point Applications Use the -fp-model, /fp Option Denormal Numbers Set the FTZ and DAZ Flags Tuning Performance IEEE Floating-Point Operations
Attributes x
align align_value allow_cpu_features concurrency_safe const cpu_dispatch, cpu_specific mpx target
Libraries x
Create Libraries Use Intel Shared Libraries on Linux Manage Libraries Redistribute Libraries When Deploying Applications Resolve References to Shared Libraries Intel's Memory Allocator Library SIMD Data Layout Templates Intel® C++ Class Libraries Intel's C++ Asynchronous I/O Extensions for Windows IEEE 754-2008 Binary Floating-Point Conformance Library Intel's Numeric String Conversion Library
SIMD Data Layout Templates x
Function Calls and Containers User-Level Interface Examples
Function Calls and Containers x
Construct an n_container Bounds
User-Level Interface x
SDLT Primitives soa1d_container aos1d_container n_container Bounds Accessors Proxy Objects Number Representation Indexes Convenience and Correctness
aos1d_container x
access_by
n_container x
Layouts Shape make_ n_container template function extent_d template function
Shape x
n_extent_generator
Bounds x
bounds_t sdlt::bounds Template Function n_bounds_t n_bounds_generator bounds_d Template Function
Accessors x
soa1d_container::accessor and aos1d_container::accessor soa1d_container::const_accessor and aos1d_container::const_accessor Accessor Concept
Proxy Objects x
Proxy ConstProxy
Number Representation x
aligned_offset fixed_offset
Indexes x
linear_index n_index_t n_index_generator index_d template function
Convenience and Correctness x
max_val min_val
Examples x
Efficiency with Structure of Arrays Example Complex SDLT Primitive Construction Example Forward Dependency Example Use of Offsets and Methods on a SDLT Primitive Example RGB to YUV Conversion Example
Intel® C++ Class Libraries x
C++ Classes and SIMD Operations Capabilities of C++ SIMD Classes Integer Vector Classes Floating-Point Vector Classes Classes Quick Reference Programming Example Intel's valarray Implementation
Integer Vector Classes x
Terms and Syntax Rules for Operators Assignment Operator Logical Operators Addition and Subtraction Operators Multiplication Operators Shift Operators Comparison Operators Conditional Select Operators Debug Operations Unpack Operators Pack Operators Clear MMX™ State Operator Integer Functions for Intel® Streaming SIMD Extensions Conversions between Fvec and Ivec
Floating-Point Vector Classes x
Fvec Syntax and Notation Data Alignment Conversions Constructors and Initialization Arithmetic Operators Minimum and Maximum Operators Logical Operators Compare Operators Conditional Select Operators for Fvec Classes Cacheability Support Operators Debug Operations Load and Store Operators Unpack Operators Move Mask Operators
Intel's C++ Asynchronous I/O Extensions for Windows x
Intel's C++ Asynchronous I/O Library for Windows Intel's C++ Asynchronous I/O Class for Windows
Intel's C++ Asynchronous I/O Library for Windows x
aio_read aio_write Example for aio_read and aio_write Functions aio_suspend Example for aio_suspend Function aio_error aio_return Example for aio_error and aio_return Functions aio_fsync aio_cancel Example for aio_cancel Function lio_listio Example for lio_listio Function Asynchronous I/O Function Errors
Intel's C++ Asynchronous I/O Class for Windows x
Template Class async_class get_last_operation_id wait get_status get_last_error get_error_operation_id stop_queue resume_queue clear_queue Example for Using async_class Template Class
IEEE 754-2008 Binary Floating-Point Conformance Library x
Intel® IEEE 754-2008 Binary Floating-Point Conformance Library and Usage Function List Homogeneous General-Computational Operations Functions General-Computational Operation Functions Quiet-Computational Operations Functions Signaling-Computational Operations Functions Non-Computational Operations Functions
Intel's Numeric String Conversion Library x
Use Intel's Numeric String Conversion Library Function List
Macros x
ISO Standard Predefined Macros Additional Predefined Macros Use Predefined Macros to Specify Intel® Compilers
Pragmas x
Intel-Specific Pragma Reference Intel-Supported Pragma Reference
Intel-Specific Pragma Reference x
block_loop/noblock_loop distribute_point inline, noinline, forceinline ivdep loop_count nofusion novector omp target variant dispatch ompx prefetch data prefetch/noprefetch unroll/nounroll unroll_and_jam/nounroll_and_jam vector
Compilation x
Compilation Overview Supported Environment Variables Pass Options to the Linker Specify Alternate Tools and Paths Use Configuration Files Use Response Files Global Symbols and Visibility Attributes for Linux* Save Compiler Information in Your Executable Link Debug Information Ahead of Time Compilation Device Offload Compilation Considerations Use a Third-Party Compiler as a Host Compiler for SYCL Code
Optimization and Programming x
Extensions OpenMP* Support Intel® oneAPI Level Zero Vectorization High-Level Optimization Interprocedural Optimization Methods to Optimize Code Size Intel® oneAPI DPC++/C++ Compiler Math Library
OpenMP* Support x
Add OpenMP* Support Parallel Processing Model Worksharing Using OpenMP* Control Thread Allocation OpenMP* Pragmas OpenMP* Library Support OpenMP* Advanced Issues OpenMP* Implementation-Defined Behaviors OpenMP* Examples
OpenMP* Library Support x
OpenMP* Runtime Library Routines Intel® Compiler Extension Routines to OpenMP* OpenMP* Support Libraries Use the OpenMP Libraries Thread Affinity Interface OpenMP* Memory Spaces and Allocators
Intel® oneAPI Level Zero x
Intel® oneAPI Level Zero Switch Intel® oneAPI Level Zero Backend Specification Programming with the Intel® oneAPI Level Zero Backend
Vectorization x
Automatic Vectorization Explicit Vector Programming
Automatic Vectorization x
Vectorization Programming Guidelines Use Automatic Vectorization Vectorization and Loops Loop Constructs
Explicit Vector Programming x
User-Mandated or SIMD Vectorization SIMD-Enabled Functions SIMD-Enabled Function Pointers Vectorize a Loop Using the _Simd Keyword Function Annotations and the SIMD Directive for Vectorization Explicit SIMD SYCL Extension
Interprocedural Optimization x
Use Interprocedural Optimization Performance and Large Program Considerations Create a Library from IPO Objects Inline Expansion of Functions
Intel® oneAPI DPC++/C++ Compiler Math Library x
Use the Intel® oneAPI DPC++/C++ Compiler Math Library Math Function List Trigonometric Functions Hyperbolic Functions Exponential Functions Special Functions Nearest Integer Functions Remainder Functions Miscellaneous Functions Complex Functions C99 Macros
Compatibility and Portability x
Standards Conformance GCC Compatibility and Interoperability Microsoft Compatibility Port from Microsoft Visual C++* to the Intel® oneAPI DPC++/C++ Compiler Port from GCC* to the Intel® oneAPI DPC++/C++ Compiler
Port from Microsoft Visual C++* to the Intel® oneAPI DPC++/C++ Compiler x
Modify Your makefile Other Considerations
Port from GCC* to the Intel® oneAPI DPC++/C++ Compiler x
Modify Your makefiledpc Other Considerations
Intel® oneAPI DPC++/C++ Compiler Developer Guide and Reference

xHost, QxHost

Tells the compiler to generate instructions for the highest instruction set available on the compilation host processor.

Syntax

Linux:

-xHost

Windows:

/QxHost

Arguments

None

Default

varies

On Windows systems, if neither /Qx nor /arch is specified, the default target architecture supports Intel® SSE2 instructions.

On Linux systems, if neither -x nor -m is specified, the default target architecture supports Intel® SSE2 instructions.

Description

This option tells the compiler to generate instructions for the highest instruction set available on the compilation host processor.

The instructions generated by this compiler option differ depending on the compilation host processor.

The following table describes the effects of specifying the [Q]xHost option and it tells whether the resulting executable will run on processors different from the host processor.

Descriptions in the table refer to Intel® Advanced Vector Extensions 2 (Intel® AVX2), Intel® Advanced Vector Extensions (Intel® AVX), Intel® Streaming SIMD Extensions (Intel® SSE), and Supplemental Streaming SIMD Extensions (SSSE).

Instruction Set of Host Processor

Effects When the -xHost or /QxHost Compiler Option is Specified

Intel® AVX2

When compiling on Intel® processors:

Corresponds to option [Q]xCORE-AVX2. The generated executable will not run on non-Intel processors and it will not run on Intel® processors that do not support Intel® AVX2 instructions.

When compiling on non-Intel processors:

Corresponds to option -march=core-avx2 (Linux*) or /arch:CORE-AVX2 (Windows*). The generated executable will run on Intel® processors and non-Intel processors that support at least Intel® AVX2 instructions.. You may see a runtime error if the runtime processor does not support Intel® AVX2 instructions.

Intel® AVX

When compiling on Intel® processors:

Corresponds to option [Q]xAVX. The generated executable will not run on non-Intel processors and it will not run on Intel® processors that do not support Intel® AVX instructions.

When compiling on non-Intel processors:

Corresponds to option -mavx (Linux) or /arch:AVX (Windows). The generated executable will run on Intel® processors and non-Intel processors that support at least Intel® AVX instructions. You may see a runtime error if the runtime processor does not support Intel® AVX instructions.

Intel® SSE4.2

When compiling on Intel® processors:

Corresponds to option [Q]xSSE4.2. The generated executable will not run on non-Intel processors and it will not run on Intel® processors that do not support Intel® SSE4.2 instructions.

When compiling on non-Intel processors:

Corresponds to option -msse4.2 (Linux) or /arch:SSE4.2 (Windows). The generated executable will run on Intel® processors and non-Intel processors that support at least Intel® SSE4.2 instructions. You may see a runtime error if the runtime processor does not support Intel® SSE4.2 instructions.

Intel® SSE4.1

When compiling on Intel® processors:

Corresponds to option [Q]xSSE4.1. The generated executable will not run on non-Intel processors and it will not run on Intel® processors that do not support Intel® SSE4.1 instructions.

When compiling on non-Intel processors:

Corresponds to option -msse4.1 (Linux) or /arch:SSE4.1 (Windows). The generated executable will run on Intel® processors and non-Intel processors that support at least Intel® SSE4.1 instructions. You may see a runtime error if the runtime processor does not support Intel® SSE4.1 instructions.

SSSE3

When compiling on Intel® processors:

Corresponds to option [Q]xSSSE3. The generated executable will not run on non-Intel processors and it will not run on Intel® processors that do not support SSSE3 instructions.

When compiling on non-Intel processors:

Corresponds to option -mssse3 (Linux) or /arch:SSSE3 (Windows). The generated executable will run on Intel® processors and non-Intel processors that support at least SSSE3 instructions. You may see a runtime error if the runtime processor does not support SSSE3 instructions.

Intel® SSE3

When compiling on Intel® processors:

Corresponds to option [Q]xSSE3. The generated executable will not run on non-Intel processors and it will not run on Intel® processors that do not support Intel® SSE3 instructions.

When compiling on non-Intel processors:

Corresponds to option -msse3 (Linux) or /arch:SSE3 (Windows). The generated executable will run on Intel® processors and non-Intel processors that support at least Intel® SSE3 instructions. You may see a warning runtime error if the runtime processor does not support Intel® SSE3 instructions.

Intel® SSE2

When compiling on Intel® processors or non-Intel processors:

Corresponds to option -msse2 (Linux) or /arch:SSE2 (Windows). The generated executable will run on Intel® processors and non-Intel processors that support at least Intel® SSE2 instructions. You may see a runtime error if the runtime processor does not support Intel® SSE2 instructions.

For more information on other settings for option [Q]x, see that option description.

NOTE:

This option only applies to host compilation. When offloading is enabled, it does not impact device-specific compilation.

Product and Performance Information

Performance varies by use, configuration and other factors. Learn more at www.Intel.com/PerformanceIndex.

Notice revision #20201201

IDE Equivalent

Visual Studio: Code Generation > Intel Processor-Specific Optimization

Eclipse: Code Generation > Intel Processor-Specific Optimization

Alternate Options

None

Parent topic: Code Generation Options

See Also

x, Qx compiler option
ax, Qax compiler option
m compiler option
arch compiler option
Level Two Title