Intel® oneAPI DPC++/C++ Compiler Developer Guide and Reference
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arch
Tells the compiler which features it may target, including which instruction sets it may generate.
Syntax
Linux: |
None |
Windows: |
/arch:code |
Arguments
code |
Indicates to the compiler a feature set that it may target, including which instruction sets it may generate. Many of the following descriptions refer to Intel® Streaming SIMD Extensions (Intel® SSE) and Supplemental Streaming SIMD Extensions (SSSE). Possible values are:
|
Default
varies |
If option arch is not specified, the default target architecture supports Intel® SSE2 instructions. |
Description
This option tells the compiler which features it may target, including which instruction sets it may generate.
Code generated with these options should execute on any compatible, non-Intel processor with support for the corresponding instruction set.
Options /arch and /Qx are mutually exclusive. If both are specified, the compiler uses the last one specified and generates a warning.
If you specify both the /Qax and /arch options, the compiler will not generate Intel-specific instructions.
This option only applies to host compilation. When offloading is enabled, it does not impact device-specific compilation.
IDE Equivalent
Visual Studio: Code Generation > Enable Enhanced Instruction Set
Eclipse: None
Xcode: None
Alternate Options
None