Visible to Intel only — GUID: owa1692187901978
Ixiasoft
4.4.1. Editing the Packaged Subsystem
4.4.2. Step 4a: Add Two Checkbox Controls
4.4.3. Step 4b: Enable or Disable Modules and Checkboxes
4.4.4. Step 4c: Run run_system_script
4.4.5. Step 4d: Iterate Over All Parameters
4.4.6. Step 4e: Setting DisplayPort IP Functionality
4.4.7. Step 4f: Make Packaged Subsystem Unlockable
4.4.8. Step 4g: Sync System Infos, Assign Base Addresses, and Save
Visible to Intel only — GUID: owa1692187901978
Ixiasoft
2. About This Application Note
This application note demonstrates the advantages of the packaged subsystem feature available in Platform Designer using an example DisplayPort Core system. You can readily share and reuse a Platform Designer system by creating a packaged subsystem. The packaged subsystem combines everything about the pre-verified and parameterized system into a single, compressed, and portable .qcp file for reuse in other Platform Designer systems.
The DisplayPort Core design example that this document describes includes the following components:
- Receiver (Rx) subsystem
- Transmitter (Tx) subsystem
- CPU subsystem
Figure 1. DisplayPort Core System
The Tx and Rx subsystems are based on the DisplayPort Intel® FPGA IP. The Tx and Rx subsystems are very similar to one another to help demonstrate the features of the packaged subsystem feature.