Configuration via Protocol

Resource Documentation

Description

Configuration via protocol (CvP) implementation in V-series FPGA devices user guide

This user guide discusses the modes, topologies, features, design considerations, and software for CvP.

Intel Arria 10 CvP initialization and partial reconfiguration over PCI Express user guide

This user guide discusses the modes, topologies, features, design considerations, and software for CvP in 20 nm FPGAs.

Intel Stratix 10 configuration via protocol (CvP) implementation user guide

This document describes the CvP configuration scheme for Intel Stratix 10 device family.

Intel® Agilex™ device configuration via protocol (CvP) implementation user guide

This document describes the CvP configuration scheme for Intel Agilex device family.

FPGA configuration via protocol white paper

This white paper describes how CvP helps your system meet the PCIe wake-up time requirement in 28 nm FPGAs.

Driver and Tools

 

Software driver code (14 nm and 10 nm)

This is the code for an open-source Linux* driver to configure the core of an FPGA via CvP. You can use this open-source code as a reference when writing your own driver, or customize this driver to perform CvP operations on your system.

Refer to Intel® Agilex™ Device Configuration via Protocol (CvP) Implementation User Guide or Intel® Stratix® 10 Configuration via Protocol (CvP) Implementation User Guide for more details about CvP driver support.

Software driver code (28 nm and 20 nm)

(Download the driver code)

This is the code for an open-source Linux driver to configure the core of an FPGA via CvP. You can use this open-source code as a reference when writing your own driver, or customize this driver to perform CvP operations on your system.