Cyclone Series: Cyclone® IV, Cyclone® V, Cyclone® V SoC
Stratix Series: Stratix® IV, Stratix® V
Supported Device Family:
nxTCP Standard Edition, 10G TCP/IP + MAC IP Cores for FPGAs
The world’s most reliable and mature full hardware TCP/IP and MAC IP Cores.
Bring the best-in-class network connectivity to your hardware design with Enyx rock-solid and acclaimed Ethernet IP Cores. Minimize time-to-market with our full RTL implementation and support. Stay always at the forefront of technology with our frequent updates with the latest improvements and optimizations.
10G Ethernet connectivity. Maximum bandwidth delivered with low latency.
Full RTL Layers 2, 3 and 4, which include Enyx proprietary full-hardware TCP/IP, ARP, ICMP and MAC implementations.
Easy to use standardized Avalon and AXI-4 interfaces.
Multiple instances per FPGA and multiple logical interfaces per instance, each of them with a unique IPv4, MAC address, VLAN ID, Gateway and Mask.
Up to 4096 simultaneous sessions per instance, configurable in client or server mode.
Device Utilization and Performance
Please refer to http://www.enyx.com/nxtcp-standard-edition/
Free 30-day evaluation and full documentation available. Request them at firstname.lastname@example.org
IP Quality Metrics
Year IP was first released
Latest version of Quartus supported
Altera Customer Use
IP has been successfully implemented in production with at least one customer
Customer deliverables include the following:
Design file (encrypted source code or post-synthesis netlist)
Simulation model for ModelSim Altera edition
Timing and/or layout constraints
Testbench or design example
Documentation with revision control
Any additional customer deliverables provided with IP
Getting Started Guide
Parameterization GUI allowing end user to configure IP
IP core is enabled for OpenCore Plus Support
Software drivers provided
Driver OS support
OS-independent and Linux
AXI; Avalon-MM; Other: Avalon-STT
IP-XACT Metadata included
Y. Altera Board Name Altera Stratix V GX FPGA Dev. Kit, BittWare S5-PCIe-HQ, ReFLEX CES Stratix 5 and Arria 10 boards
Industry standard compliance testing performed
If No, is it planned?
IP has undergone interoperability testing
Interoperability reports available
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