LDPC Intel® FPGA IP Core

Low-density parity-check (LDPC) codes are linear error correction codes that allow you to transmit messages over noisy channels.

Supported standards:

  • DOCSIS 3.1
    • Decoder only
    • On-the-fly switching between code
  • WiMedia 1.5
    • Encoder/Decoder
    • Variable code-word length
    • Optional on-the-fly switching between code
    • Support short and long frame
  • DVB-S2
    • Encoder
  • NASA
    • Encoder/Decoder (CCSDS compliant)
    • Optional low resource architecture available
    • MSA or layered MSA decoding
  • MATLAB* bit-accurate models for simulation

Typical expected performance and utilization figures for this core based on device are provided in the LDPC IP Core User Guide.

For technical support on this IP core, please visit Intel Premier Support. You can also search for related topics on this function in the Knowledge Center.