Figure 1. Three-Stage Decimating CIC Filter Used in DDC
Figure 1. Three-Stage Decimating CIC Filter Used in DDC
Figure 2. Three-Stage Interpolating Filter Used in DUC
The CIC Intel® FPGA IP core implements a cascaded integrator-comb (CIC) filter with data ports that are compatible with the Avalon® Streaming (Avalon-ST) interface. CIC filters (also known as Hogenauer filters) are computationally efficient for extracting baseband signals from narrow-band sources using decimation. They also construct narrow-band signals from processed baseband signals using interpolation.
CIC filters use only adders and registers; they require no multipliers to handle large rate changes. Therefore, CIC is a suitable and economical filter architecture for hardware implementation, and is widely used in sample-rate-conversion designs, such as digital down converters (DDC) and digital up converters (DUC).
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