Intel® FPGA Compute Express Link (CXL) IP

First FPGA shipping with CXL hard IP with up to 4x more bandwidth per port.1

Now with support for CXL specification revision 1.1 and 2.0.

Intel® FPGA Compute Express Link (CXL) IP

IP Quality Metrics

Basics

Year IP was first released 2022
Status Preliminary
Deliverables

Customer deliverables include the following:

Design file (encrypted source code or post-synthesis netlist)

Timing and/or layout constraints

User Guide

 

Y

Y

Y

Any additional customer deliverables provided with IP Testbench, debug toolkit, and design examples

Product and Performance Information

1Compared to competitors FPGAs (no CXL hard IP) using 3rd party CXL controller (soft IP running at Gen4 x8).
2Activation of CXL hard IP requires separate licensing/purchase and is included with IP support logic ordering part numbers.