CPRI Intel® FPGA IP

The Common Public Radio Interface (CPRI) Intel FPGA IP core implements the CPRI Specification V7.0.

Read the CPRI Intel FPGA IP user guide ›

Read the F-Tile CPRI PHY Intel® FPGA IP user guide ›

Read the E-tile Hard IP user guide ›

CPRI Intel® FPGA IP

CPRI Intel FPGA IP Core Performance: Device and Transceiver Speed Grade Support

Device Family

CPRI Line Bit Rate (Gbps)

 

0.6144

1.2288

2.4576

3.072

4.9152

6.1440

8.11008

9.8304

10.1376

12.16512

24.33024

Intel® Stratix® 10 FPGA

1

-2 / -3

-2 / -2

Intel® Arria® 10 FPGA

1

-3 / -4


1

Stratix® V GT

-3 / H3

-2 / H2


1

Stratix V GX

-4 / H3

-2 / H2

1

Arria® V GZ

-4 / H3

-3 / H2

1

Arria V GX

-6 / H6

-5 / H4

-5 / H4

1

Arria V GT

-5/H3

1

Cyclone® V GT

-7 / H5

1

Cyclone V GX

-8 / H7

-7 / H6

1

IP Quality Metrics

Basics

Year IP was first released

2014

First year supported by Intel Quartus Prime Software

14.0

Status

Production

Deliverables

Customer deliverables include the following:

Design file (encrypted source code or post-synthesis netlist)

Simulation model for ModelSim* - Intel FPGA Edition

Timing and/or layout constraints

Documentation with revision control

Read me file

Yes for all. Simulation model is applicable to all ModelSim versions, not just Intel FPGA Edition.

Any additional customer deliverables provided with IP

Customer simulation test bench

Parameterization GUI allowing end user to configure IP

Yes

IP core is enabled for Intel FPGA IP Evaluation Mode Support

No, because this is a Web core. License needed before installation.

Source language

Verilog

Testbench language

Verilog

Software drivers provided

N/A

Driver operating system (OS) support

N/A

Implementation

User interface

As per user guide documentation

IP-XACT metadata

No

Verification

Simulators supported

As per user guide documentation

Hardware validated

Yes for all supported devices

Industry-standard compliance testing performed

N/A

If Yes, which test(s)?

N/A

If Yes, on which Intel FPGA device(s)?

N/A

If Yes, date performed

N/A

If No, is it planned?

N/A

Interoperability

IP has undergone interoperability testing

No

If yes, on which Intel FPGA device(s)

-

Interoperability reports available

-