1.2. Test Engine FPGA IP v3.0.0
| Description | Impact |
|---|---|
| The Test Engine IP now adds Agilex™ 3 device support. | The Test Engine IP now supports Agilex™ 3, Agilex™ 5, and Agilex™ 7 devices. |
| Optimized logic synthesis of memory AXI4 drivers. | Improved timing closure for smaller test engine IP variants of 1 to 8 drivers. |
Note: This documentation is preliminary and subject to change.