JTAG Boundary-Scan Testing User Guide: Agilex™ 5 FPGAs and SoCs
ID
820038
Date
4/01/2024
Public
1. Agilex™ 5 JTAG BST Overview
2. Agilex™ 5 JTAG BST Architecture
3. Agilex™ 5 BST Operation Control
4. Agilex™ 5 I/O Voltage for JTAG Operation
5. Enabling and Disabling Agilex™ 5 BST Circuitry
6. Agilex™ 5 BST Guidelines
7. Document Revision History for the JTAG Boundary-Scan Testing User Guide: Agilex™ 5 FPGAs and SoCs
3.1. Device ID
The device ID is unique for each Agilex™ 5 device. Use this ID to identify the device in a JTAG chain.
Product Line | DeviceID (32 bits) | |||
---|---|---|---|---|
Version(4 bits) | Part Number (16 Bits) | Manufacture Identity (11 Bits) | LSB (1 Bit) | |
A5EC065BB23AR0 | 0000 | 0011 0110 0011 1111 | 0000 1101 110 | 1 |
A5EC065BB32AR0 | 0000 | 0011 0110 0100 1111 | 0000 1101 110 | 1 |
A5ED065BB23AR0 | 0000 | 0011 0110 0011 1111 | 0000 1101 110 | 1 |
A5ED065BB32AR0 | 0000 | 0011 0110 0100 1111 | 0000 1101 110 | 1 |