Test Engine FPGA IP User Guide: Agilex™ 3, Agilex™ 5, and Agilex™ 7 FPGAs

ID 817758
Date 3/31/2025
Public
Document Table of Contents

5.3.1.4.4. hbm_mem_traversal_rand

Usage

def traffic_patterns.MemAxi4DriverPrograms.hbm_mem_traversal_rand (self)

Description

HBM traffic pattern that randomly writes to and reads from the full address space of one pseudochannel.

Performs the following traffic sequence with data integrity checks (checks if read data matches write data):
  1. Writes to the full address space of a pseudochannel (1GB for FP82, 500MB for FP84)

  2. Reads from the full address space of a pseudochannel (1GB for FP82, 500MB for FP84)

The burst length used is based on the data width:
  • 512bits or 576bits - BL64

  • 256bits or 288bits - BL128

  • Less than 256bits - BL128

Refer to the bulider function mem_traversal for requirements and validation checks on this program.