Test Engine FPGA IP User Guide: Agilex™ 3, Agilex™ 5, and Agilex™ 7 FPGAs

ID 817758
Date 3/31/2025
Public
Document Table of Contents

5.2.2.25. sleep_cmd

Usage

def pyhydra.ipkits.hydra.driver_mem_axi4.driver_compiler.MemAxi4Driver.sleep_cmd (cls, cycles)

Description

Sleep for some cycles.

The driver idles for the specified number of clock cycles. The driver can consume AXI responses in this duration.

Parameters

cycles

Number of clock cycles to idle for.

Returns

Compiler IR object