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1. About Triple-Speed Ethernet Intel® FPGA IP for Agilex™ 5 devices
2. Getting Started
3. Parameter Settings
4. Functional Description
5. Configuration Register Space
6. Interface Signals
7. Design Considerations
8. Timing Constraints
9. Testbench
10. Triple-Speed Ethernet Intel® FPGA IP User Guide Archives
11. Document Revision History for the Triple-Speed Ethernet Intel® FPGA IP User Guide: Agilex™ 5 FPGAs and SoCs
A. Ethernet Frame Format
B. Simulation Parameters
4.1.1. MAC Architecture
4.1.2. MAC Interfaces
4.1.3. MAC Transmit Datapath
4.1.4. MAC Receive Datapath
4.1.5. MAC Transmit and Receive Latencies
4.1.6. FIFO Buffer Thresholds
4.1.7. Congestion and Flow Control
4.1.8. Magic Packets
4.1.9. MAC Local Loopback
4.1.10. MAC Reset
4.1.11. PHY Management (MDIO)
4.1.12. Connecting MAC to External PHYs
6.1.1. 10/100/1000 Ethernet MAC Signals
6.1.2. 10/100/1000 Multiport Ethernet MAC Signals
6.1.3. 10/100/1000 Ethernet MAC with 1000BASE-X/SGMII PCS Signals
6.1.4. 10/100/1000 Ethernet MAC with Internal FIFO Buffers, and 1000BASE-X/SGMII 2XTBI PCS with Embedded PMA (GTS) Signals
6.1.5. 10/100/1000 Multiport Ethernet MAC with 1000BASE-X/SGMII PCS Signals
6.1.6. 1000BASE-X/SGMII PCS Signals
6.1.7. 1000BASE-X/SGMII 2XTBI PCS Signals
6.1.1.1. Clock and Reset Signals
6.1.1.2. Clock Enabler Signals
6.1.1.3. MAC Control Interface Signals
6.1.1.4. MAC Status Signals
6.1.1.5. MAC Receive Interface Signals
6.1.1.6. MAC Transmit Interface Signals
6.1.1.7. Pause and Magic Packet Signals
6.1.1.8. MII/GMII/RGMII Signals
6.1.1.9. PHY Management Signals
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5.2.2. Status Register (Word Offset 0x01)
Bit | Name | R/W | Description |
---|---|---|---|
0 | EXTENDED_CAPABILITY | RO | A value of 1 indicates that the PCS function supports extended registers. |
1 | JABBER_DETECT | — | Unused. Always set to 0. |
2 | LINK_STATUS | RO | A value of 1 indicates that a valid link is established. A value of 0 indicates an invalid link. If the link synchronization is lost, a 0 is latched. |
3 | AUTO_NEGOTIATION_ABILITY |
RO |
A value of 1 indicates that the PCS function supports auto-negotiation. |
4 | REMOTE_FAULT | — | Unused. Always set to 0. |
5 | AUTO_NEGOTIATION_COMPLETE |
RO |
A value of 1 indicates the following status:
|
6 | MF_PREAMBLE_SUPPRESSION | — | Unused. Always set to 0. |
7 | UNIDIRECTIONAL_ABILITY | RO | A value of 1 indicates that the PCS is able to transmit from MII/GMII regardless of whether the PCS has established a valid link. |
8 | EXTENDED_STATUS | — | Unused. Always set to 0. |
9 | 100BASET2_HALF_DUPLEX | RO | The PCS function does not support 100Base-T2, 10-Mbps, 100BASE-X, and 100Base-T4 operation. Always set to 0. |
10 | 100BASET2_FULL_DUPLEX | ||
11 | 10MBPS_HALF_DUPLEX | ||
12 | 10MBPS_FULL_DUPLEX | ||
13 | 100BASE-X_HALF_DUPLEX | ||
14 | 100BASE-X_FULL_DUPLEX | ||
15 | 100BASE-T4 |