Visible to Intel only — GUID: bhc1410931512275
Ixiasoft
Visible to Intel only — GUID: bhc1410931512275
Ixiasoft
5.2.1. Control Register (Word Offset 0x00)
Bit(s) | Name | R/W | Description |
---|---|---|---|
0:4 | Reserved | — | — |
5 | UNIDIRECTIONAL_ENABLE | RW | Enables the unidirectional function. This bit depends on bit 12. When bit 12 is one, this bit is ignored. When bit 12 is zero, bit 5 indicates the unidirectional function:
The reset value of this bit is zero. |
6, 13 | SPEED_SELECTION | RO | Indicates the operating mode of the PCS function. Bits 6 and 13 are set to 1 and 0 respectively. This combination of values represent the gigabit mode. Bit [6, 13]:
|
7 | COLLISION_TEST | RO | The 1000BASE-X PCS function does not support half-duplex mode. This bit is always set to 0. Ignore this bit if you are using SGMII PCS function. |
8 | DUPLEX_MODE | RO | The 1000BASE-X PCS function only supports full-duplex mode. This bit is always set to 1. Ignore this bit if you are using SGMII PCS function. |
9 | RESTART_AUTO_ NEGOTIATION |
RW |
Set this bit to 1 to restart the auto-negotiation sequence. For normal operation, set this bit to 0 (reset value). |
10 | ISOLATE | RW | Set this bit to 1 to isolate the PCS function from the MAC layer device. For normal operation, set this bit to 0 (reset value). |
11 | POWERDOWN |
RW |
Set this bit to 1 to power down the transceiver quad. The PCS function then asserts the powerdown signal to indicate the state it is in. |
12 | AUTO_NEGOTIATION_ENABLE |
RW |
Set this bit to 1 (reset value) to enable auto-negotiation. |
14 | SD_LOOPBACK | RW | PHY loopback. Set this bit to 1 to implement loopback in the external transceiver. For normal operation, set this bit to 0 (reset value). This bit is ignored if reduced ten-bit interface (RTBI) is implemented. |
15 | RESET | RW | Self-clearing reset bit. Set this bit to 1 to generate a synchronous reset pulse which resets all the PCS function state machines, comma detection function, and 8b/10b encoder and decoder. For normal operation, set this bit to 0 (asynchronous reset value). |