1G/2.5G/5G/10G Multirate Ethernet PHY IP User Guide: Agilex™ 3 and Agilex™ 5 FPGAs and SoCs
ID
813667
Date
8/04/2025
Public
1. About the 1G/2.5G/5G/10G Multirate Ethernet PHY IP for Agilex™ 3 and Agilex™ 5 Devices
2. Getting Started
3. Functional Description
4. Parameter Settings for 1G/2.5G/5G/10G Multirate Ethernet PHY IP
5. Interface Signals
6. Configuration Registers
7. Debug Checklist
8. 1G/2.5G/5G/10G Multirate Ethernet PHY IP User Guide: Agilex™ 3 and Agilex™ 5 FPGAs and SoCs Archives
9. Document Revision History for the 1G/2.5G/5G/10G Multirate Ethernet PHY IP User Guide: Agilex™ 3 and Agilex™ 5 FPGAs and SoCs
3.2.1.1. Step 1: Generating the 1G/2.5G/5G/10G Multirate Ethernet PHY IP
3.2.1.2. Step 2: QSF settings and Dynamic Reconfiguration (DR) profile assignments
3.2.1.3. Step 3: RTL Generation using Quartus® Prime Pro Edition Tool
3.2.1.4. Step 4: Instantiate the IP top file with the GTS Dynamic Reconfiguration Controller IP
5.1. Clock Signals
5.2. Reset Signals
5.3. Serial Interface Signals
5.4. Avalon Memory-Mapped Interface Signals
5.5. XGMII Signals
5.6. GMII Signals
5.7. PHY Status Signals
5.8. Transceiver Mode and Operating Speed Signals
5.9. Transceiver Status and Reconfiguration Signals
5.10. GTS Reset Sequencer Signals
5.11. Dynamic Reconfiguration Controller Interface Signals
1.5. Resource Utilization
The following estimates are obtained by compiling the 1G/2.5G/5G/10G Multirate Ethernet PHY IP for Agilex™ 3 and Agilex™ 5 devices using the Quartus® Prime Pro Edition software.
Speed | ALM | ALUT | Logic Register | Memory Block (M20K) |
---|---|---|---|---|
10M/100M/1G/2.5G (with 8-bit/16-bit adapter for HPS) with DR enabled | 3156 | 3514 | 4715 | 4 |
10M/100M/1G/2.5G with DR enabled | 1885 | 2519 | 3074 | 3 |
1G/2.5G with DR enabled | 1635 | 2180 | 2585 | 3 |
10M/100M/1G/2.5G/10G with DR enabled | 2650 | 3589 | 4502 | 11 |
1G/2.5G/10G with DR enabled | 2049 | 3244 | 4011 | 11 |
10M/100M/1G/2.5G/5G/10G (USXGMII) | 1298 | 1797 | 2119 | 4 |
2.5G MGBASE | 1766 | 2329 | 2955 | 3 |
2.5G (MGBASE) with IEEE 1588v2 | 3008 | 3797 | 5072 | 4 |
1G/2.5G (MGBASE) with IEEE 1588v2 | 3047 | 3929 | 5025 | 4 |
1G/2.5G/10G MGBASE PCS only | 1718 | 1943 | 3020 | 9 |
10M/100M/1G/2.5G/5G/10G MGBASE PCS only with SGMII enabled | 1977 | 2217 | 3347 | 9 |
1G/2.5G/10G (MGBASE) with IEEE 1588v2 | 3025 | 4016 | 5184 | 12 |
10M/100M/1G/2.5G/5G/10G (USXGMII) with IEEE 1588v2 | 2798 | 3740 | 5454 | 6 |