AN 1005: Signal Tap Logic Analyzer Getting Started Tutorial

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ID 792742
Date 2/15/2024
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2.1. Step 1: Getting Started

Follow these steps to copy the tutorial reference design files to your working environment, compile the design, and open the Signal Tap logic analyzer:

  1. Obtain the Intel Arria 10 FPGA - Signal Tap Logic Analyzer Getting Started Design Example from the Intel FPGA Design Store. Download the .qar file for the tutorial design.
  2. In the Intel® Quartus® Prime software, click File > Open Project to open the counter_stp.qar project archive file.
  3. To compile the design, click Processing > Start Compilation.
  4. When compilation is complete, close the Timing Analyzer window that displays by default.
    Figure 2. Signal Tap Logic Analyzer Window


  5. To open the Signal Tap logic analyzer, click Tools > Signal Tap Logic Analyzer.
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