Intel Agilex® 7 Device Family Pin Connection Guidelines: M-Series

Download PDF
ID 776197
Date 9/27/2023
Public
Document Table of Contents
Document Table of Contents x
1. Intel Agilex® 7 Device Family Pin Connection Guidelines: M-Series
1. Intel Agilex® 7 Device Family Pin Connection Guidelines: M-Series x
1.1. Pins Status for Intel Agilex® 7 M-Series Devices 1.2. Intel Agilex® 7 M-Series FPGA Core Pins 1.3. Intel Agilex® 7 M-Series HBM2E Pins 1.4. Intel Agilex® 7 M-Series F-Tile Pins 1.5. Intel Agilex® 7 M-Series R-Tile Pins 1.6. Intel Agilex® 7 M-Series Hard Processor System (HPS) Pins 1.7. Intel Agilex® 7 M-Series Power Supply Sharing Guidelines 1.8. Notes to Intel Agilex® 7 M-Series Device Family Pin Connection Guidelines 1.9. Document Revision History for the Intel Agilex® 7 Device Family Pin Connection Guidelines: M-Series
1.2. Intel Agilex® 7 M-Series FPGA Core Pins x
1.2.1. Clock and PLL Pins 1.2.2. Dedicated Configuration/JTAG Pins 1.2.3. Optional/Dual-Purpose Configuration Pins 1.2.4. Differential I/O Pins 1.2.5. External Memory Interface Pins 1.2.6. Voltage Sensor and Voltage Reference Pins 1.2.7. Remote Temperature Sensing Diode Pins 1.2.8. Reference Pins 1.2.9. No Connect and DNU Pins 1.2.10. Power Supply Pins 1.2.11. Secure Device Manager (SDM) Pins 1.2.12. Secure Device Manager (SDM) Optional Signal Pins
1.3. Intel Agilex® 7 M-Series HBM2E Pins x
1.3.1. HBM2E Power Supply Pins 1.3.2. HBM2E Signal Pins
1.4. Intel Agilex® 7 M-Series F-Tile Pins x
1.4.1. F-Tile Power Supply Pins 1.4.2. F-Tile Transceiver Pins
1.5. Intel Agilex® 7 M-Series R-Tile Pins x
1.5.1. R-Tile Power Supply Pins 1.5.2. R-Tile Transceiver Pins
1.6. Intel Agilex® 7 M-Series Hard Processor System (HPS) Pins x
1.6.1. HPS Supply Pins 1.6.2. HPS Oscillator Clock Input Pin 1.6.3. HPS JTAG Pins 1.6.4. HPS GPIO Pins 1.6.5. HPS SDMMC Pins 1.6.6. HPS NAND Pins 1.6.7. HPS USB Pins 1.6.8. HPS EMAC Pins 1.6.9. HPS I2C_EMAC and MDIO Pins 1.6.10. HPS I2C Pins 1.6.11. HPS SPI Pins 1.6.12. HPS UART Pins 1.6.13. HPS Trace Pins
1.7. Intel Agilex® 7 M-Series Power Supply Sharing Guidelines x
1.7.1. Example 1— Intel Agilex® 7 M-Series Devices with R-Tile, F-Tile and HBM2E Using DDR4 1.7.2. Example 2— Intel Agilex® 7 M-Series Devices with R-Tile, F-Tile and HBM2E Using DDR5 1.7.3. Example 3— Intel Agilex® 7 M-Series Devices with R-Tile and F-Tile, Without HBM2E Using DDR4 1.7.4. Example 4— Intel Agilex® 7 M-Series Devices with F-Tile only and HBM2E Using DDR4 1.7.5. Example 5— Intel Agilex® 7 M-Series Devices with F-Tile only and HBM2E Using DDR5 1.7.6. Example 6— Intel Agilex® 7 M-Series Devices with F-Tile only and Without HBM2E Using DDR5
1. Intel Agilex® 7 Device Family Pin Connection Guidelines: M-Series

1.2.8. Reference Pins

Note: Intel recommends that you create an Intel® Quartus® Prime design, enter your device I/O assignments, and compile the design. The Intel® Quartus® Prime software will check your pin connections according to I/O assignment and placement rules. The rules differ from one device to another based on device density, package, I/O assignments, voltage assignments, and other factors that are not fully described in this document or the device handbook.
Table 8.  Reference Pins
Pin Name Pin Functions Pin Description Connection Guidelines

RZQ_[T,B]_2[A,B,C,D,E,F]

RZQ_[T,B]_3[A,B,C,D,E,F]

I/O

Reference pins for I/O banks. The RZQ pins share the same VCCIO_PIO with the I/O bank where they are located.

Connect the external precision resistor to the designated pin within the bank. If not required, this pin is a regular I/O pin.

These pins support 1.3-V, 1.2-V, 1.1-V, and 1.05-V I/O standards.

These pins support the programmable pull-up resistor. For more information, refer to the Intel Agilex® 7 M-Series Device Data Sheet.

For more information about the supported pins, refer to the device pin-out file.

When using OCT, tie these pins to GND through a 240-Ω resistor.

When you do not use these pins as dedicated input for the external precision resistor or as I/O pins, leave these pins unconnected.
Level Two Title