Agilex™ 7 Device Family Pin Connection Guidelines: M-Series
ID
776197
Date
8/11/2025
Public
1.1. Pin Connection Guideline Status for Agilex™ 7 M-Series Devices
1.2. Agilex™ 7 M-Series FPGA Core Pins
1.3. Agilex™ 7 M-Series HBM2E Pins
1.4. Agilex™ 7 M-Series F-Tile Pins
1.5. Agilex™ 7 M-Series R-Tile Pins
1.6. Agilex™ 7 M-Series Hard Processor System (HPS) Pins
1.7. Agilex™ 7 M-Series Power Supply Sharing Guidelines
1.8. Notes to Agilex™ 7 M-Series Device Family Pin Connection Guidelines
1.9. Document Revision History for the Agilex™ 7 Device Family Pin Connection Guidelines: M-Series
1.2.1. Clock and PLL Pins
1.2.2. Dedicated Configuration/JTAG Pins
1.2.3. Optional/Dual-Purpose Configuration Pins
1.2.4. Differential I/O Pins
1.2.5. External Memory Interface Pins
1.2.6. Voltage Sensor and Voltage Reference Pins
1.2.7. Remote Temperature Sensing Diode Pins
1.2.8. Reference Pins
1.2.9. No Connect and DNU Pins
1.2.10. Power Supply Pins
1.2.11. Secure Device Manager (SDM) Pins
1.2.12. Secure Device Manager (SDM) Optional Signal Pins
1.6.1. HPS Supply Pins
1.6.2. HPS Oscillator Clock Input Pin
1.6.3. HPS JTAG Pins
1.6.4. HPS GPIO Pins
1.6.5. HPS SDMMC Pins
1.6.6. HPS NAND Pins
1.6.7. HPS USB Pins
1.6.8. HPS EMAC Pins
1.6.9. HPS I2C_EMAC and MDIO Pins
1.6.10. HPS I2C Pins
1.6.11. HPS SPI Pins
1.6.12. HPS UART Pins
1.6.13. HPS Trace Pins
1.7.1. Example 1— Agilex™ 7 M-Series Devices with R-Tile, F-Tile and HBM2E Using DDR4
1.7.2. Example 2— Agilex™ 7 M-Series Devices with R-Tile, F-Tile and HBM2E Using DDR5
1.7.3. Example 3— Agilex™ 7 M-Series Devices with R-Tile and F-Tile, Without HBM2E Using DDR4
1.7.4. Example 4— Agilex™ 7 M-Series Devices with F-Tile only and HBM2E Using DDR4
1.7.5. Example 5— Agilex™ 7 M-Series Devices with F-Tile only and HBM2E Using DDR5
1.7.6. Example 6— Agilex™ 7 M-Series Devices with F-Tile only and Without HBM2E Using DDR5
1.1. Pin Connection Guideline Status for Agilex™ 7 M-Series Devices
Note: The pin connection guideline statuses in this document represent the full Agilex™ 7 M-Series device family. For the data sheet status of a specific Agilex™ 7 M-Series device, refer to the Agilex™ 7 M-Series FPGAs and SoCs Device Data Sheet. For the Agilex™ 7 M-Series device pin-out status, refer to the device pin-out file.
The following descriptors designate the status level currently applicable to the relevant variant:
- Preliminary: Information in this document is subject to change. Intended for pre-production development, for production designs use with caution.
- Final: Information in this document is intended for use in production design.
Tile | Status |
---|---|
Core Pins | Final |
HPS Pins | Final |
HBM2E | Final |
F-Tile | Final |
R-Tile | Final |
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