FPGA AI Suite: Getting Started Guide

ID 768970
Date 3/29/2024
Document Table of Contents

B. FPGA AI Suite Getting Started Guide Document Revision History

Document Version FPGA AI SuiteVersion Changes
2024.03.29 2024.1
  • Added support for Ubuntu 22.04.
2024.02.12 2023.3.1
  • Updated for additional Agilex™ 7 support.
2024.02.02 2023.3
  • Corrected OpenVINO™ version in graphic in "FPGA AI Suite Installation Overview".
2023.12.01 2023.3
  • Added instructions for a WSL 2 environment to "Building an FPGA Bitstream for the PCIe Example Design".
2023.09.06 2023.2.1
  • Updated supported OpenVINO™ version to 2022.3.1 LTS.
  • Updated installation instructions for Ubuntu 18 operating systems.
2023.07.17 2023.2
  • Corrected instructions in "Installing OpenVINO™ Toolkit".
2023.07.03 2023.2
  • Added "Installing FPGA AI Suite on Windows* Subsystem for Linux".
  • Revised " OpenVINO™ Toolkit" for OpenVINO™ 2022.3 LTS.
  • Renamed "Installing the FPGA AI Suite " to " FPGA AI Suite Installation Overview" to better reflect the contents of that section.
  • Updated supported OpenVINO™ version to 2022.3 LTS.
  • Updated OpenVINO™ installation paths to /opt/intel/openvino_2023.
  • Updated FPGA AI Suite installation paths to /opt/intel/fpga_ai_suite_2023.2.
  • Changed occurrences of tools/downloader/downloader.py to omz_downloader.
  • Changed occurrences of tools/downloader/converter.py to omz_converter.
2023.04.05 2023.1
  • Added "Performing Inference on the i3d Graph".
  • Renamed thedlac command. The FPGA AI Suite compiler command is now dla_compiler.
  • Updated the Intel® Agilex™ product family name to "Intel Agilex® 7."
2022.12.23 2022.2
  • Update for the Debian package-based install.
  • Add walk-through for validating a YOLOv3 model.
  • Update to account for the new Terasic DE10-Agilex BSP ZIP file.
  • Renamed dla_create_and_build_pcie_ed.py to dla_build_example_design.py



  • Minor fixes to some file names, including one for the running inference in the AOT flow on the FPGA.



  • Notes on installing CMake for CentOS 7.
  • Clarifications to the Model Zoo and Model Optimizer install instructions.



  • Extensively revised installation instructions.
  • Added installation information for the PCI-based design examples.
  • Enhanced details for Intel Agilex devices.
  • Added a quick-start tutorial.
  • Removed supplementary performance details.



  • Added information for initial Intel Agilex device family support.



  • Expanded list of tasks performed by the Intel FPGA AI Suite Compiler.
  • Distinguished more clearly between requirements for the IP and requirements for the Example Designs.



  • Renamed the script that sets the Intel FPGA AI Suite environment variables to init_env.sh. It was called coredla_developer_init_env.sh in earlier releases.



  • Initial release.