FPGA AI Suite: Getting Started Guide

ID 768970
Date 3/29/2024
Document Table of Contents

5.3.2. Additional Software Prerequisites for the PCIe-Based Design Example for Arria® 10 Devices

The Intel® PAC with Arria® 10 GX FPGA board used by the PCIe-based design example for Arria® 10 devices adds the following additional software prerequisites:

  • Linux kernel version 4.15

    This kernel is provided in Ubuntu* 18.04.1, which is listed as the operating system prerequisite for the PCIe-based design example for Arria® 10 devices in PCIe-based Design Example for Arria 10 Operating System Prerequisites.

  • Intel® Acceleration Stack for Development Version 1.2.1 (includes Quartus® Prime Pro Edition Version 19.2)
  • Quartus® Prime Pro Edition Version 19.2

    This software is needed only if you plan to create bitstreams that correspond to customized FPGA AI Suite IP instances.

The Intel® Acceleration Stack includes a version of Quartus® Prime Pro Edition Version 19.2 that does not require a license.

Download the Intel® Acceleration Stack Version 1.2.1 from FPGA Development tab at the following URL: https://www.intel.com/content/www/us/en/software-kit/665840/intel-pac-with-intel-arria-10-gx-fpga-acceleration-stack-version-1-2-1.html.

Ensure that you are downloading a10_gx_pac_ias_1_2_1_pv_dev.tar.gz. The download should be approximately 1.1GB.

For installation instructions, see "Installing the Intel® Acceleration Stack Development Package on the Host Machine" in Intel® Acceleration Stack Quick Start Guide for Intel® Programmable Acceleration Card with Arria® 10 GX FPGA .

Important: After you install the Intel® Acceleration Stack, reboot your system so that the Intel® PAC with Arria® 10 GX FPGA board can be detected by the lspci command.

Intel® Acceleration Stack Installation Summary

The following commands install a version of the stack that is suitable for use with the PCIe-based example design for Arria® 10 devices on Ubuntu* 18.04.1:
tar zxf a10_gx_pac_ias_1_2_1_pv_dev.tar.gz
cd a10_gx_pac_ias_1_2_1_pv_dev_installer
Warning: The installation script asks for sudo permission early in the process and might ask for sudo permission again near the end of the process. If you do not monitor the installation, the sudo command times out and you need to repeat the installation.
During the installation, some prompts ask you about optional features. Answer them as follows:
  • Do you wish to install the OPAE?


  • Do you wish to install OPAE PACsign package?


  • Accept the license and choose the install directory

    The recommendation is to use default directory.

  • After the Intel® Acceleration Stack I installation finishes, the installer installs Quartus® Prime Pro Edition. Choose the Quartus® Prime installation directory

    The recommendation is to use the default directory.

Intel® Acceleration Stack Environment Settings for Design Example

Each time before you use the PCIe-based design example for Arria® 10 devices, run the following commands:
export OPAE_SDK_ROOT=/usr/
source /home/$USER/inteldevstack/init_env.sh

Consider adding these commands to your .bashrc file.

If you did not install the Intel® Acceleration Stack into the default location, then adjust these commands to reflect your installation location.

The first time that you the source init_env.sh command, you might need to use a root shell.

The init_env.sh script configures huge pages and sets permissions so that the fpgaconf command does not need to use the sudo command later. If the init_env.sh script fails, you might see errors when the runtime initializes DMA or when programming the FPGA AFU bitstream (the partial reconfiguration region).

Bitstream Generation Requirements

If you plan to create bitstreams that correspond to custom FPGA AI Suite IP instances (or want to create your own bitstreams), then add the Platform Designer command (qsys) to your PATH environment variable. Add the following commands into your .bashrc file, and adjust the paths depending on your installation locations if needed:
export PATH

After you successfully install the board, continue by installing the compiler and IP generation tool as described in Installing the FPGA AI Suite Compiler and IP Generation Tools.