Multi Channel DMA Intel® FPGA IP for PCI Express* User Guide

ID 683821
Date 7/30/2024
Public
Document Table of Contents

3.10.2.2. D2H Descriptor Status (d2hdm_desc_status)

The table below is the D2H Data Mover descriptor status sent to the external DMA controller when it completes the execution of a descriptor.

Table 34.  D2H Descriptor Status
Name Width Description
DESC_IDX1 [15:0] 16

Unique Identifier for each descriptor. This is copied from original request.

App_specific_bits [18:16] 3

Application specific bits

Error [19] 1

Error Status

Reserved field only.

DESC_IDX2 [31:20] 12

DESC_IDX2 copied from original request