4.7. Legacy Interrupt Interface
Legacy interrupts mimic the original PCI level-sensitive interrupts using virtual wire messages. The MCDMA in Endpoint mode signals legacy interrupts on the PCIe link using Message TLPs. The term INTx refers collectively to the four legacy interrupts INTA#,INTB#, INTC# and INTD#. You can assert app_int_i to cause an Assert_INTx Message TLP to be generated and sent upstream. A deassertion of app_int_i, i.e a transition of this signal from high to low, causes a Deassert_INTx Message TLP to be generated and sent upstream.
To use legacy interrupts, you must clear the Interrupt Disable bit, which is bit 10 of the Command Register in the configuration header. Then, you must turn off the MSI Enable bit.
This interface is available when the Enable Legacy Interrupt checkbox is enabled under the PCIe Settings > PCIe Avalon Settings tab in the IP Parameter Editor.
Signal Name | I/O Type | Description |
---|---|---|
p#_app_int_i[7:0] | Input | When asserted, these signals indicate an assertion of an INTx message is requested. A transition from high to low indicates a deassertion of the INTx message is requested. Each bit is associated with a corresponding physical function. Only available in EP mode.
Note: Legacy interrupts are currently not supported by the MCDMA IP. Tie these unused inputs to 0.
|
p#_app_int_ready_o[7:0] | Output | One bit per physical function. The app_int_i value should be held until app_int_ready_o=1. Only available in EP mode. |
p#_irq_status_o | Output | These signals drive legacy interrupts to the Application Layer in Root Port mode. The source of the interrupt is logged in the Root Port Interrupt Status registers (x4, x8: rp_irq_status, x16: root_port_irq_status) in the Port Configuration and Status registers. Only available in RP mode. |