Clock Control Altera™ FPGA IP Release Notes

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ID 683802
Date 4/07/2025
Public
Document Table of Contents
Document Table of Contents x
1. Clock Control Altera™ FPGA IP Release Notes ( Stratix® 10 Devices) 2. Clock Control Altera™ FPGA IP Release Notes ( Agilex™ Devices)
1. Clock Control Altera™ FPGA IP Release Notes ( Stratix® 10 Devices) x
1.1. Clock Control Altera™ FPGA IP v20.0.1 1.2. Clock Control Intel FPGA IP v20.0.0 1.3. Clock Control Intel FPGA IP v19.1.0 1.4. Clock Control Intel Stratix 10 FPGA IP v18.0 1.5. Stratix 10 Clock Control v17.1 1.6. Stratix® 10 Clocking and PLL User Guide Archives
2. Clock Control Altera™ FPGA IP Release Notes ( Agilex™ Devices) x
2.1. Clock Control Altera™ FPGA IP v2.0.1 2.2. Clock Control Intel FPGA IP v2.0.0 2.3. Clock Control Intel FPGA IP v1.0.0 2.4. Agilex™ 7 Clocking and PLL User Guide: F-Series and I-Series Archives
1. Clock Control Altera™ FPGA IP Release Notes ( Stratix® 10 Devices)
2. Clock Control Altera™ FPGA IP Release Notes ( Agilex™ Devices)

2.1. Clock Control Altera™ FPGA IP v2.0.1

Table 6.  v2.0.1 2025.04.07
Quartus® Prime Version Description Impact
25.1
  • Renamed the IP to Clock Control Altera™ FPGA IP.
  • Added support for the Agilex™ 3 device family.
The device family is only available in Quartus® Prime Pro Edition software version 25.1 onwards.
Table 7.  v2.0.1 2024.04.01
Quartus® Prime Version Description Impact
24.1 Added support for the Agilex™ 5 device family. The device family is only available in Quartus® Prime Pro Edition software version 24.1 onwards.
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