5G Polar Intel® FPGA IP User Guide

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ID 683766
Date 6/30/2022
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Document Table of Contents
Document Table of Contents x
1. About the 5G Polar Intel® FPGA IP 2. Getting Started with the 5G Polar Intel® FPGA IP 3. Designing with the 5G Polar Intel® FPGA IP 4. 5G Polar Intel® FPGA IP Functional Description 5. 5G Polar IP User Guide Archive 6. Document Revision History for the 5G Polar Intel® FPGA IP User Guide
1. About the 5G Polar Intel® FPGA IP x
1.1. 5G Polar Intel® FPGA IP Features 1.2. 5G Polar Intel® FPGA IP Device Family Support 1.3. Release Information for the 5G Polar Intel® FPGA IP 1.4. 5G Polar IP Performance and Resource Utilization
2. Getting Started with the 5G Polar Intel® FPGA IP x
2.1. Installing and Licensing Intel® FPGA IP Cores
2.1. Installing and Licensing Intel® FPGA IP Cores x
2.1.1. Intel® FPGA IP Evaluation Mode 2.1.2. 5G Polar IP Timeout Behavior
3. Designing with the 5G Polar Intel® FPGA IP x
3.1. 5G Polar IP Directory Structure 3.2. Generating a 5G Polar IP 3.3. Simulating the 5G Polar IP with the VCS Simulator 3.4. Simulating the 5G Polar IP with MATLAB 3.5. Simulating the 5G Polar IP with the C-model
3.3. Simulating the 5G Polar IP with the VCS Simulator x
3.3.1. Simulation Results for the 5G Polar IP
4. 5G Polar Intel® FPGA IP Functional Description x
4.1. 5G Polar IP Signals 4.2. 5G Polar IP Throughput and Latency
1. About the 5G Polar Intel® FPGA IP
2. Getting Started with the 5G Polar Intel® FPGA IP
3. Designing with the 5G Polar Intel® FPGA IP
4. 5G Polar Intel® FPGA IP Functional Description
5. 5G Polar IP User Guide Archive
6. Document Revision History for the 5G Polar Intel® FPGA IP User Guide

3.4. Simulating the 5G Polar IP with MATLAB

Verify that the RTL behaves the same as these models.
Before simulating, generate a 5G Polar design example.
  1. In MATLAB, run make.m from the \matlab\ directory.
    >> make
    MATLAB generates MEX.
  2. Run the example test function polar5g_codec_tb.m.
    >>polar5g_codec_tb(<list_size>, <len_type>, <crc_type>, <il_on>);

    where:

    • list_size corresponds to the compile-time parameter NUM_LIST in the RTL
    • len_type corresponds to the param_len input in the RTL
    • crc_type corresponds to the param_crc input in the RTL
    • il_on corresponds to the param_il input in the RTL

    For example,

    >> polar5g_codec_tb(4, 2, 4, 1);
    This test case runs list size = 4, code block length = 64, CRC = CRC16, and the interleaver is on.
    The test function generates polar5g_codec_params.txt, polar5g_enc_in.txt, polar5g_enc_out.txt, polar5g_dec_in.txt, and polar5g_dec_out.txt, which you may use in RTL simulation as inputs or as reference outputs.

    The simulation runs both the encoder and the decoder functions, even if you generate only an encoder or a decoder.

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