AN 954: Hierarchical Partial Reconfiguration Tutorial: for the Intel Agilex® 7 FPGA Development Board

ID 683687
Date 1/16/2024

Answers to Top FAQs

Updated for:
Intel® Quartus® Prime Design Suite 23.3

What is hierarchical partial reconfiguration?


What do I need for this reference design?

Reference Design Requirements

How do I get the reference design?

Reference Design Files

How do I perform HPR?

Reference Design Walkthrough

What is a PR persona?

Defining Personas

How do I program the board?

Program the Board

What are the PR known issues and limitations?

Intel FPGA Support Forums: PR

Do you have training on PR?

Intel FPGA Technical Training Catalog