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2.3.6. Interrupt Controller
- Platform interrupts with 16 level-sensitive interrupt request (IRQ) inputs.
- Internally-generated Timer and Software interrupt. You can access the timer interrupt register using the Timer and Software interrupt module interface by connecting to the data bus.
During an interrupt, the core writes the program counter of the attached instruction into the machine exception program counter (mepc) register. An interrupt is usually attached to the instruction in E-stage or in the preceding F-stage or D-stage pipeline. Because the M-stage initiates the general-purpose register, the core is not capable of retracting a memory instruction in the M-stage. If an instruction in M-stage flags an exception while an interrupt is pending and ready to be serviced, the core fetches and executes the exception instruction. If a memory or multicycle instruction is pending in the M-stage, for example, the core is waiting for the response, the core does not flag an interrupt until it receives a response for that instruction. Pending interrupts are flagged by their corresponding bits in Machine Interrupt-Pending (mip) register.
An interrupt is taken only when Machine Status Register (mstatus) bit 3 is asserted and bits corresponding to its pending interrupt in Machine Interrupt-pending (mip) register is asserted.
|mstatus||mstatus/Machine Interrupt-Enable (MIE) field||Global interrupt-enable bit for machine mode|
|mie||mie[31:16]/Platform interrupt-enable field||Platform interrupt-enable bit for 16 hardware interrupts|
|mie/Machine Timer Interrupt-Enable (MTIE) field||Timer interrupt-enable bit for machine mode|
|mie/Machine Software Interrupt-enable (MSIE) field||Software interrupt-enable bit for machine mode|
|mip||mip[31:16]/Platform interrupt-pending field||Platform interrupt-pending bit for 16 hardware interrupts|
|mip/Machine Timer Interrupt-Pending (MTIP) field||Timer interrupt-pending bit for machine mode|
|mip/Machine Software Interrupt-Pending (MSIP) field||Software interrupt-pending bit for machine mode|
Timer and Software Interrupt Module
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