1.2. Deliverables Included with the Reference Design
The reference design includes the following components:
- Software application and Windows driver configured specifically for this reference design
- FPGA programming files for the Arria II GX FPGA Development Kit for x1, x4, and x8 Gen1 operation
- FPGA programming files for the Cyclone IV GX FPGA Development Kit for x1 and x4 Gen1 operation
- FPGA programming files for the Stratix IV GX FPGA Development Kit for x1, x4, and x8 Gen1 and Gen2 operation
- FPGA programming files for Arria V GT FPGA Development Kit for x1 and x4 Gen1 and Gen2 operation. Also included are x8 Gen1 programming files
- FPGA programming files for Cyclone V GT FPGA Development Kit for x1 and x4 Gen1 operation
- FPGA programming files for Stratix V GX FPGA Development Kit for x1, x4 and x8 Gen1 and Gen2 operation. Also x1 and x4 Gen3 andx1 programming files are included
- FPGA programming files for Arria 10 GX FPGA Development Kit for x1 Gen1, x8 Gen2, and x4 Gen3
- Quartus® II Archives Files (.qar) for the development boards and configurations, including SRAM Object File (.sof), Programmer Object File (.pof), and SignalTap® II Files (.stp)
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