L-Tile and H-Tile Avalon® Memory-mapped+ Intel® FPGA IP for PCI Express* User Guide

ID 683527
Date 3/05/2024
Public
Document Table of Contents

7.1.3.3. Using the Traffic Generator (BAS Example Design Only)

To use the Traffic Generator, the host software must follow the following steps:

  1. Allocate a block of memory in PCIe space.
  2. Program one of the windows in the Address Mapper to point to the block of memory allocated in step 1.
  3. Set the Traffic Generator’s Write Address register to point to the base of window selected in step 2.
  4. Set the Traffic Generator’s Write Count to the size of the block of memory allocated in step 1 (or 1MB if the block of memory is larger than 1MB).
  5. Write to the Traffic Generator’s Write Control register to:
    1. Set the target_size to the size of the block of memory.
    2. Set the transfer size to the desired size, e.g. 512 bytes.
    3. Set the enable bit to start traffic generation.
  6. Read the Traffic Generator’s Write Count register to check that the desired number of transfers have occurred.